? semiconductor components industries, llc, 2003 february, 2003 - rev. 1 1 publication order number: nsdemp11xv6t1/d nsdemp11xv6t1, nsdemp11xv6t5 common anode quad array switching diode these common anode epitaxial planar quad diodes are designed for use in ultra high speed switching applications. the nsdemp11xv6t1 device is housed in the sot-563 package which is designed for low power surface mount applications, where board space is at a premium. ? fast t rr ? low c d ? available in 8 mm; 7 inch tape and reel maximum ratings (t a = 25 c) rating symbol value unit reverse voltage v r 80 vdc peak reverse voltage v rm 80 vdc forward current i f 100 madc peak forward current i fm 300 madc peak forward surge current i fsm (note 1) 2.0 adc 1. t = 1 s thermal characteristics characteristic (one junction heated) symbol max unit total device dissipation t a = 25 c derate above 25 c p d 357 (note 2) 2.9 (note 2) mw mw/ c thermal resistance junction-to-ambient r ja 350 (note 2) c/w characteristic (both junctions heated) symbol max unit total device dissipation t a = 25 c derate above 25 c p d 500 (note 2) 4.0 (note 2) mw mw/ c thermal resistance junction-to-ambient r ja 250 (note 2) c/w junction and storage temperature t j , t stg - 55 to +150 c 2. fr-4 @ minimum pad electrical characteristics (t a = 25 c) characteristic symbol condition min max unit reverse voltage leakage current i r v r = 70 v - 0.1 adc forward voltage v f i f = 100 ma - 1.2 vdc reverse breakdown voltage v r i r = 100 a -0 e vdc diode capacitance c d v r = 6.0 v, f = 1.0 mhz - 3.5 pf reverse recovery time t rr (note 2) i f = 5.0 ma, v r = 6.0 v, r l = 100 , i rr = 0.1 i r - 4.0 ns 3. t rr test circuit for nsdemp11xv6t1 in figure 4. http://onsemi.com sot-563 case 463a plastic 1 2 3 6 5 4 p9 = specific device code d = date code marking diagram p9 d (1) (2) (3) (4) (5) (6) device package shipping ordering information nsdemp11xv6t1 sot-563 4 mm pitch 4000/tape & reel nsdemp11xv6t5 sot-563 2 mm pitch 8000/tape & reel
nsdemp11xv6t1, nsdemp11xv6t5 http://onsemi.com 2 typical electrical characteristics 100 0.2 0.4 v f , forward voltage (volts) 0.6 0.8 1.0 1.2 10 1.0 0.1 10 0 v r , reverse voltage (volts) 1.0 0.1 0.01 0.001 10 20 30 40 50 1.75 0 v r , reverse voltage (volts) 1.5 1.25 1.0 0.75 c d , diode capacitance (pf) 2468 i f , forward current (ma) figure 1. forward voltage figure 2. reverse current figure 3. diode capacitance t a = 150 c t a = 125 c t a = 85 c t a = 55 c t a = 25 c i r , reverse current ( m a) t a = 85 c t a = -40 c t a = 25 c a r l t r t p t 10% 90% v r t p = 2 s t r = 0.35 ns i f t rr t i rr = 0.1 i r i f = 5.0 ma v r = 6 v r l = 100 recovery time equivalent test circuit input pulse output pulse figure 4. reverse recovery time test circuit for the nsdemp11xv6t1
nsdemp11xv6t1, nsdemp11xv6t5 http://onsemi.com 3 the values for the equation are found in the maximum ratings table on the data sheet. substituting these values into the equation for an ambient temperature t a of 25 c, one can calculate the power dissipation of the device which in this case is 150 milliwatts. information for using the sot-563 surface mount package minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will self align when subjected to a solder reflow process. sot-563 power dissipation p d = t j(max) - t a r ja p d = 150 c - 25 c 833 c/w = 150 milliwatts the power dissipation of the sot-563 is a function of the pad size. this can vary from the minimum pad size for soldering to a pad size given for maximum power dissipa- tion. power dissipation for a surface mount device is deter- mined by t j(max) , the maximum rated junction temperature of the die, r ja , the thermal resistance from the device junction to ambient, and the operating temperature, t a . using the values provided on the data sheet for the sot-563 package, p d can be calculated as follows: the 833 c/w for the sot-563 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 150 milli- watts. there are other alternatives to achieving higher power dissipation from the sot-563 package. another alternative would be to use a ceramic substrate or an aluminum core board such as thermal clad ? . using a board material such as thermal clad, an aluminum core board, the power dissipation can be doubled using the same footprint. soldering precautions the melting temperature of solder is higher than the rated temperature of the device. when the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. there- fore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. ? always preheat the device. ? the delta temperature between the preheat and soldering should be 100 c or less.* ? when preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. when using infrared heating with the reflow soldering method, the difference shall be a maximum of 10 c. ? the soldering temperature and time shall not exceed 260 c for more than 10 seconds. ? when shifting from preheating to soldering, the maximum temperature gradient shall be 5 c or less. ? after soldering has been completed, the device should be allowed to cool naturally for at least three minutes. gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. ? mechanical stress or shock should not be applied during cooling. * soldering a device without preheating can cause exces- sive thermal shock and stress which can result in damage to the device. 1.35 0.0531 0.5 0.0197 mm inches scale 20:1 0.5 0.0197 1.0 0.0394 0.45 0.0177 0.3 0.0118 sot-563
nsdemp11xv6t1, nsdemp11xv6t5 http://onsemi.com 4 package dimensions sot-563, 6 lead case 463a-01 issue o g m 0.08 (0.003) x d 6 5 pl c j -x- -y- notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. dim a min max min max inches 1.50 1.70 0.059 0.067 millimeters b 1.10 1.30 0.043 0.051 c 0.50 0.60 0.020 0.024 d 0.17 0.27 0.007 0.011 g 0.50 bsc 0.020 bsc j 0.08 0.18 0.003 0.007 k s style 1: pin 1. emitter 1 2. base 1 3. collector 2 4. emitter 2 5. base 2 6. collector 1 a b y 12 3 4 5 s k style 2: pin 1. emitter 1 2. emitter2 3. base 2 4. collector 2 5. base 1 6. collector 1 0.004 0.012 0.059 0.067 0.10 0.30 1.50 1.70 6 style 3: pin 1. cathode 1 2. cathode 1 3. anode/anode 2 4. cathode 2 5. cathode 2 6. anode/anode 1 style 4: pin 1. collector 2. collector 3. base 4. emitter 5. collector 6. collector on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. typicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including typicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 2-9-1 kamimeguro, meguro-ku, tokyo, japan 153-0051 phone : 81-3-5773-3850 on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. nsdemp11xv6t1/d thermal clad is a trademark of the bergquist company. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303-675-2175 or 800-344-3860 toll free usa/canada fax : 303-675-2176 or 800-344-3867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 800-282-9855 toll free usa/canada
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